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You could modify the pointed out parameters, and Look at it with a "excellent" consequence which usually takes two several hours siumlation time. Determined by your conditions, you can quicken the simulation time.

So can someone make sure you clarify how FET with minimal threshold voltage has larger speed and better leakage recent when FET with substantial threshold are going to be sluggish but reduced on electrical power?

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The problem is for popularsongs my research I have to do things like sweep voltage, frequency, load resistance etc. to analyse their impact on the output

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Commonly this occurs after you externally wire a crystal and so on. - this introduces a very superior velocity oscillator which bottlenecks the simulation and is completely superfluous anyway. Clock frequency is specified being a assets in the microcontroller machine.